DK-DEV-5SGXEA7N【PDF 290/527 页】KIT DEV STRATIX V FPGA 5SGXEA7

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SV51013

2013.05.06

Hot-Socketing Feature

11-5

For details about device specification and connection guidelines, refer to the external temperature sensor

device datasheet from the device manufacturer.

Related Information

? Stratix V Device Datasheet

Provides details about the external TSD specification.

? Stratix V E, GS, and GX Device Family Pin Connection Guidelines

Provides details about the TEMPDIODE P /TEMPDIODE N pin connection when you are not using an

external TSD.

? Stratix V GT Device Family Pin Connection Guidelines

Provides details about the TEMPDIODE P /TEMPDIODE N pin connection when you are not using an

external TSD.

Hot-Socketing Feature

Stratix V devices support hot socketing — also known as hot plug-in or hot swap.

The hot-socketing circuitry monitors the V CCIO , V CCPD , and V CC power supplies and all V CCIO and V CCPD

banks.

When powering up or powering down these power supplies, refer to the Power-Up Sequence section of this

handbook.

During the hot-socketing operation, the I/O pin capacitance is less than 15 pF and the clock pin capacitance

is less than 20 pF.

The hot-socketing capability removes some of the difficulty that designers face when using the Stratix V

devices on PCBs that contain a mixture of devices with different voltage requirements.

The hot-socketing capability in Stratix V devices provides the following advantages:

? You can drive signals into the I/O, dedicated input, and dedicated clock pins before or during power up

or power down without damaging the device. External input signals to the I/O pins of the unpowered

device will not power the power supplies through internal paths within the device.

? The output buffers are tri-stated during system power up or power down. Because the Stratix V device

does not drive signals out before or during power up, the device does not affect the other operating buses.

? You can insert or remove a Stratix V device from a powered-up system board without damaging or

interfering with the system board's operation. This capability allows you to avoid sinking current through

the device signal pins to the device power supply, which can create a direct connection to GND that

causes power supply failures.

? During hot socketing, Stratix V devices are immune to latch up that can occur when a device is hot-

socketed into an active system.

Altera uses GND as a reference for hot-socketing and I/O buffer circuitry designs. To ensure proper operation,

connect GND between boards before connecting the power supplies. This prevents GND on your board

from being pulled up inadvertently by a path to power through other components on your board. A pulled

up GND could otherwise cause an out-of-specification I/O voltage or over current condition in the Altera

device.

Power Management in Stratix V Devices

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